Front End Verification Engineers (IC Design) - (California City, CA)

Front End Verification Engineers (IC Design) Duration: 1+ year Location: Santa Clara, CA Pay level: $70/hr on C2C Visa: H1B, Green Card ,US Citizen, GC-EAD Note : We need to fill-up quickly & therefore no room for visa transfer time Client : Xilinx Position summary : Seeking an experienced front end implementation engineer for the development of high-performance IP blocks in the company's next generation FPGA product. Successful candidates will be responsible for prototype implementation of assigned IP blocks to ensure RTL meets all defined quality metrics. As a member of the Processor Systems Design and Verification group, you will work on both design flow automation and product implementation for tapeout. Close interaction with both the RTL design team and signoff implementation team is essential. Assignments include running RTL LINT, DFT DRC, logic synthesis, logic equivalence checking, low power checks, Memory BIST insertion, scan insertion, SDC verification, and CDC verification.