ASIC Lead Design Engineer with Security Clearance - (Sunnyvale, CA)

As a member of the ASIC SoC Design team, you will be responsible for the following: * Microarchitecture and design high-performance (low-latency, high-bandwidth, high-frequency), low-power on-chip fabric/interconnect and fabric components - HDL programming background with VHDL, Verilog, and/or SystemVerilog. - Applicant must possess outstanding verbal and writing expertise. *This job necessitates special access to support the program and requires the selected applicant to be a US Citizen Desired skills - Background with Mentor Graphics Modelsim or Questasim, Synopsys Synplify Pro, and Libero SoC. - Background building with Xilinx Virtex-5QV, Microsemi antifuse (RTSX and/or RTAX) and SoC (RTG4) devices and Xilinx 7-series or newer devices. - Develop RTL design of 1 or more blocks following established design guidelines based on microarchitecture spec. Own all aspects of RTL development design