Senior Manager - SMAR01 - (Chicago, IL)

Responsibilities: The successful applicant will be part of a team responsible for design and development of large SOC chips with multiple processor cores. Will be responsible to manage a team of RTL / Logic designers. Responsible for project schedules / milestones. Monitor project progress and take corrective action as needed. Work with architecture, verification and PD group to ensure project progress. Qualifications: Have successfully managed a team of designers for a high-speed ASIC / Silicon project. As manager, must have successfully guided and mentored both senior and junior teammates. Must have had significant interactions with other teams within and outside the organization to facilitate and meet project goals. Pursue continuous development / improvement of the team to strengthen the organization and teammates. Preferred/Plus: Background in Cpu Core and Memory subsystem design is highly desired. Other Skills: