Physical Design Engineer - (Minneapolis, MN)

**Position description** Physical Design Engineer: Design and development of very high frequency, deep sub-micron CMOS POWER and System Z microprocessors and subsystem. Use sophisticated design tools and leading-edge CMOS technology to implement circuit schematics (custom and ASIC) and verify against technology design rules. Design, coordinate and manage clock and power distribution across all levels. Optimize buffering and wiring to meet timing, yield, and manufacturability constraints. Work locations: Poughkeepsie, NY Austin, TX **Required Technical and Professional Ability** + CMOS circuit design + Netlist to GDSII flow (ASIC design flow) + Timing Analysis, PSPICE simulation + Physical Design Verification Tools (Design Rule Checking (DRC); Layout vs Schematic (LVS), etc), min 5 years background. **Preferred Tech and Prof Background** + Effective communication expertise + Programming skills (PERL, C++, python, etc.) and background with CADENCE are a significant advantage.